Recent display devices are often required to achieve a high precision of voltages supplied to source lines (also referred to as signal lines or data lines) of display panels; the voltages supplied to the source lines may be simply referred to as “source voltages”, hereinafter. For example, in a display device incorporating an OLED (organic light emitting diode) display panel, which exhibits a larger change in the brightness against the source voltage, it is preferable to generate the source voltages with a higher precision in view of improvement in the display image quality.
The issue of the precision of the source voltages is especially significant in displaying an image including a region of a single color. When an image including a region of a single color is displayed, the same image data are supplied for the pixels in the region, where an image data indicates the grayscale levels of the respective subpixels of a pixel; however, a low precision of the source voltages undesirably results in outputting different source voltages for the same image data. This is visually perceived by the user as color unevenness in the region.
One possible cause of deterioration in the precision of the source voltages is manufacturing variations among buffer amplifiers. The buffer amplifiers referred to herein are amplifiers used as output stages that drive the source lines. The buffer amplifiers have a low output impedance in order to drive the source lines having a large load capacitance. The buffer amplifiers have random offset voltages caused by mismatching (or variations) of the semiconductor elements (e.g., MOS (metal oxide semiconductor) transistors)) integrated therein. A large random offset voltage undesirably deteriorates the precision of the source voltage.
To reduce the offset voltage of a buffer amplifier, it is desired to reduce the mismatching among circuit elements in a differential input circuit, which operates as a first stage (input stage) and an active load circuit. It is especially desired to reduce the mismatching among circuit elements in the differential input circuit, because the generation of the offset voltage is mainly governed by the first stage. It is known in the art that increasing the element sizes is especially effective for reducing the mismatching among circuit elements in the differential input circuit and the active load circuit, although improving the symmetricity of the circuit layout and supplying the properly-controlled bias voltages and bias currents are also effective. The increase in the element size, however, undesirably causes an increased parasitic capacitance, reduced operation speed and higher cost.
Due to such background, it is desired to provide a technology for properly addressing the generation of the offset voltage in a buffer amplifier.
Note that Japanese Patent Application Publication No. 2015-211266 discloses one example of the configuration of a differential amplifier circuit used as a buffer amplifier of a display driver that drives a display panel.